3D package applications such as package-on-package (PoP) are becoming increasingly popular and widely used in mobile devices because they can enhance electrical performance by increasing bandwidth and shortening routing distance between logic chips (e.g., application processors) and memory chips, for instance. However, with the advent of wide input/output (wide IO) memory chips, higher speed and lower power requirements, package body size, and the number of package layers requirements are increasing. Larger and thicker devices and the physical dimensions electrical performances are becoming constrained. Existing PoP devices are challenged to meet fine channels and high density routing requirements using conventional ball joint packages due to yield loss at the ball joint. Improved devices and methods of manufacturing the same are required.